4. Field Effect Transistors

Learning Objectives

• Explain how a field effect transistor controls current using an electric field rather than a base current
• Identify the source, drain, and gate terminals and describe the role of the channel
• Distinguish JFETs from MOSFETs, and enhancement-mode from depletion-mode MOSFETs
• Explain why FETs have very high input impedance compared to BJTs
• Describe the three MOSFET operating regions: cutoff, triode (ohmic), and saturation
• Recognize typical FET applications in digital logic, power switching, and analog amplification

Quick Answer

A Field Effect Transistor (FET) is a three-terminal device — source, drain, and gate — that controls current flowing through a channel between source and drain using an electric field created by the gate voltage, rather than a base current like a BJT. Because the gate is either reverse-biased (JFET) or fully insulated by a thin oxide layer (MOSFET), essentially no current flows into the gate, giving FETs extremely high input impedance. This makes them ideal for analog input stages, low-power circuits, and — as MOSFETs — the switching backbone of digital logic and power electronics, since a MOSFET can be turned fully on or off using voltage alone with almost no static gate current.

Structure and Basic Idea

Every FET has three terminals:

• Source: where charge carriers enter the channel.
• Drain: where charge carriers leave the channel.
• Gate: the control terminal that creates an electric field to widen or narrow the conductive channel between source and drain.

Unlike a BJT, where base current injects carriers to sustain conduction, a FET's gate voltage simply shapes an electric field that squeezes or opens up a channel of existing majority carriers. No carriers need to be continuously injected through the gate terminal itself — which is exactly why FETs draw almost no steady-state gate current and present such high input impedance.

JFET: Junction Field Effect Transistor

A JFET consists of a channel of one doping type (say N-type) with a gate region of the opposite type (P-type) diffused around it, forming a PN junction between gate and channel. In normal operation, this gate-channel junction is kept reverse biased. As the reverse gate voltage increases, the depletion region around the junction grows, encroaching into the channel and narrowing the path available for current — exactly the same depletion-widening effect seen in a reverse-biased diode, just used here to pinch a channel rather than block a diode.

A JFET is inherently a depletion-mode device: with zero gate voltage, the channel is wide open and current flows freely (this maximum current is called I_DSS); applying reverse gate voltage progressively closes the channel until it "pinches off" completely at the pinch-off voltage, cutting current to zero. JFETs cannot be operated in enhancement mode because pushing the gate-channel junction into forward bias would simply turn it into a conducting diode, injecting unwanted gate current.

MOSFET: Metal-Oxide-Semiconductor FET

A MOSFET replaces the PN junction gate of a JFET with a metal (or polysilicon) gate electrode completely insulated from the channel by a thin layer of silicon dioxide. This insulation is the key structural difference: the gate cannot conduct current into the channel at all under normal conditions, regardless of gate voltage polarity, giving MOSFETs even higher input impedance than JFETs and letting the gate voltage swing either polarity without ever forward-biasing anything.

MOSFETs come in two families:

• Enhancement-mode MOSFET: normally off with zero gate voltage — no channel exists until a sufficient gate-source voltage (above the threshold voltage, V_T) attracts enough carriers to the surface beneath the gate to form (or "enhance") a conductive channel. This is the type used almost universally in digital logic and power switching.
• Depletion-mode MOSFET: built with a channel already present at zero gate voltage, similar in spirit to a JFET; applying a gate voltage of one polarity depletes (narrows) the channel, while the opposite polarity can further enhance it. Depletion-mode MOSFETs are less common today but appear in some analog and RF applications.

Visual Learning

MOSFET Operating Regions

Region	Condition	Behavior
Cutoff	V_GS below threshold voltage V_T (enhancement mode)	No channel exists, drain current is essentially zero
Triode (Ohmic)	V_GS above V_T, and V_DS small relative to (V_GS − V_T)	Channel acts like a voltage-controlled resistor, current roughly proportional to V_DS
Saturation	V_GS above V_T, and V_DS large enough to pinch off the channel near the drain	Drain current levels off, controlled mainly by V_GS, largely independent of V_DS

Confusingly, "saturation" in FET terminology means the current has flattened out and become largely independent of drain voltage — nearly the opposite intuition from BJT saturation, where the transistor is fully "on" with minimal voltage drop. In FETs, the triode region (not saturation) is the one that behaves like a low-resistance "on" switch state, which matters when a MOSFET is used purely as a digital switch.

Why FETs Have High Input Impedance

Because the JFET's gate junction stays reverse biased and the MOSFET's gate is separated from the channel by an insulating oxide, essentially no DC current flows into the gate terminal in either device — only a tiny leakage current on the order of picoamps to nanoamps. This is fundamentally different from a BJT, whose base-emitter junction is forward biased and continuously draws real base current to sustain conduction. High input impedance means a FET's control terminal barely loads the circuit driving it, which is why FETs are preferred for op-amp input stages, sensor interfacing, and any application where the signal source can supply only a tiny amount of current.

Key Terms

Term	Definition	Related Concept
Source	Terminal where charge carriers enter the FET channel	FET structure
Drain	Terminal where charge carriers leave the FET channel	FET structure
Gate	Control terminal creating the electric field that shapes the channel	Voltage control
Channel	Conductive path between source and drain whose width is field-controlled	Pinch-off
Pinch-off Voltage	Gate voltage (JFET) at which the channel is fully depleted, cutting off current	JFET operation
Threshold Voltage (V_T)	Minimum gate-source voltage needed to form a channel in an enhancement MOSFET	MOSFET turn-on
Enhancement Mode	MOSFET type that is normally off; gate voltage creates the channel	Digital logic
Depletion Mode	FET type that is normally on; gate voltage narrows the existing channel	JFET default behavior
I_DSS	Maximum drain current in a JFET, occurring at zero gate-source voltage	JFET characteristic

Common Mistakes

Misconception: MOSFET saturation means the transistor is fully "on," just like BJT saturation. Why it's wrong: In a BJT, saturation is the fully-on switching state with minimal voltage drop. In a FET, saturation is the region where drain current has flattened and depends mainly on gate voltage, largely independent of drain voltage — this is actually the linear amplification region, analogous to BJT active mode, not BJT saturation. Correct understanding: The FET region that behaves like a fully-on switch is the triode (ohmic) region, not saturation. Matching FET and BJT terminology by name alone leads to exactly the wrong conclusion.

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Misconception: All FETs are normally-off devices that need a gate voltage to conduct. Why it's wrong: Only enhancement-mode devices behave this way. JFETs and depletion-mode MOSFETs are normally on at zero gate voltage and require a gate voltage to reduce or cut off current. Correct understanding: Whether a FET is normally on or off depends on its specific construction (depletion vs. enhancement); always check the datasheet or symbol rather than assuming based on "FET" alone.

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Misconception: Because FET gate current is nearly zero, the gate terminal can never be damaged by voltage. Why it's wrong: MOSFET gates are separated from the channel by an extremely thin oxide layer, which can be permanently punctured by electrostatic discharge (ESD) or voltages exceeding the gate's rated maximum, even though almost no current normally flows through it in operation. Correct understanding: MOSFETs require careful handling (anti-static precautions) precisely because their high-impedance, thin-oxide gate is voltage-fragile, not current-fragile — a brief high-voltage static spike can destroy the gate oxide instantly.

Comparison and Connections

Aspect	JFET	MOSFET (Enhancement)	BJT
Control mechanism	Reverse-biased gate junction voltage	Insulated gate voltage	Base current
Input impedance	Very high	Extremely high	Relatively low
Default state at zero control input	On (depletion mode)	Off (enhancement mode)	Off
Primary use case	Analog, low-noise amplification	Digital logic, power switching	Analog amplification, general switching
Gate/base insulation	PN junction (reverse biased)	Oxide layer (fully insulated)	PN junction (forward biased when on)

Practice Questions

Recall

1. Name the three terminals of a FET and briefly state the function of each. Guidance: Source (carriers enter), drain (carriers leave), gate (creates the electric field that controls channel width).

2. What is the key structural difference between a JFET's gate and a MOSFET's gate? Guidance: A JFET's gate forms a PN junction with the channel that must stay reverse biased; a MOSFET's gate is fully insulated from the channel by a thin oxide layer, allowing either polarity of gate voltage without conduction.

Understanding

3. Explain why FETs have much higher input impedance than BJTs. Guidance: A BJT's base-emitter junction is forward biased and draws continuous base current. A FET's gate is either reverse biased (JFET, negligible current) or fully insulated (MOSFET, essentially zero current), so almost no current flows into the control terminal in either case.

4. Explain the difference between enhancement mode and depletion mode in terms of what exists at zero gate voltage. Guidance: Depletion mode devices have a conductive channel already present at zero gate voltage (normally on); enhancement mode devices have no channel until sufficient gate voltage is applied to form one (normally off).

Application

5. A digital logic designer needs a transistor that stays fully off with zero gate drive and switches on only when a logic-high voltage is applied. Which type of FET fits this requirement, and why? Guidance: Enhancement-mode MOSFET, because it is normally off at zero V_GS and only forms a conductive channel once V_GS exceeds the threshold voltage, matching the desired "off unless driven" behavior.

6. An engineer is designing a sensitive analog front-end that must not load down a high-impedance sensor. Should they choose a BJT or a FET input stage, and why? Guidance: A FET, because its gate draws negligible current, so it won't significantly load or distort the signal from a high-impedance sensor, unlike a BJT whose base current would.

Analysis

7. Compare what "saturation" means for a BJT versus a FET, and explain why using the same word for both can mislead a student switching between the two device types. Guidance: BJT saturation = fully on, minimal voltage drop, current limited by external circuit. FET saturation = current has flattened and depends mainly on gate voltage, independent of drain voltage — this is actually the FET's linear/amplifying region. A student assuming FET saturation means "fully on like a switch" would misidentify the FET's ohmic/triode region as saturation instead.

8. A MOSFET is destroyed after being handled without anti-static precautions, even though it was never connected to a circuit. Explain how this is possible given that MOSFETs draw almost no gate current. Guidance: The gate oxide is extremely thin and can be punctured by a brief high-voltage electrostatic discharge from a person's body, even without any current flowing during normal operation. The failure mode is voltage breakdown of the insulating oxide layer, not overcurrent — which is why ESD precautions matter regardless of the device's near-zero operating gate current.

FAQ

Why are MOSFETs used far more often than JFETs in modern electronics? MOSFETs can be made in both enhancement mode (normally off, ideal for digital logic and switching) and depletion mode, whereas JFETs are limited to depletion mode only. MOSFETs also scale down to extremely small sizes for integrated circuits, since their insulated gate does not require a PN junction that consumes space and adds leakage. This combination — enhancement-mode availability and easy miniaturization — is why MOSFETs dominate modern digital ICs (CMOS logic) and much of power electronics.

What does "CMOS" mean, and how does it relate to FETs? CMOS stands for Complementary Metal-Oxide-Semiconductor, referring to circuits that pair N-channel and P-channel enhancement MOSFETs together. In a CMOS logic gate, one transistor type conducts while the other is off for any given input state, so almost no current flows except briefly during switching — this is why CMOS digital circuits consume very little static power, which is central to modern low-power chip design.

Why does touching a MOSFET's leads sometimes damage it, even briefly? Static electricity built up on a person's body (from friction with clothing, carpet, etc.) can carry thousands of volts at very low current. Because the MOSFET's gate oxide is only a few atoms thick in modern devices, this voltage — even for a fraction of a second — can exceed the oxide's breakdown field strength and punch a permanent conductive path through it, ruining the transistor. This is why sensitive MOSFETs are shipped in anti-static packaging and handled with grounding straps.

Can a FET amplify signals the same way a BJT does? Yes — a FET biased in its saturation region (for MOSFETs) or active pinch-off region (for JFETs) can amplify a small AC voltage signal on the gate into a larger AC voltage swing at the drain, using a load resistor, very similarly in concept to a BJT common-emitter amplifier. FET amplifiers (common-source configuration) typically offer higher input impedance but somewhat lower transconductance (gain per volt of input) than an equivalent BJT stage.

What does "gm" (transconductance) mean for a FET, and why does it matter? Transconductance (gm) measures how much the drain current changes for a given change in gate-source voltage — essentially the FET's "gain" parameter, analogous to how β describes a BJT's current gain. It matters because it directly determines the voltage gain of a FET amplifier stage (gain ≈ gm × load resistance), and it varies with the FET's bias point, unlike β which is roughly constant over a range of currents in a BJT.

Quick Revision

• A FET has three terminals: source, drain, gate; the gate voltage creates an electric field controlling the channel
• FETs are voltage-controlled devices; BJTs are current-controlled devices
• JFETs use a reverse-biased PN junction gate; MOSFETs use a fully insulated oxide gate
• JFETs and depletion-mode MOSFETs are normally on at zero gate voltage; enhancement-mode MOSFETs are normally off
• FETs have very high input impedance because negligible current flows into the gate
• MOSFET regions: cutoff (off), triode/ohmic (acts like a resistor, used as a switch's "on" state), saturation (current flattens, used for amplification)
• FET "saturation" means current levels off with gate control — the opposite intuition from BJT "saturation" (fully on)
• Enhancement-mode MOSFETs dominate digital logic (CMOS) and power switching because they can be made normally off and scale to very small sizes
• MOSFET gates are voltage-fragile (thin oxide) despite drawing almost no current — ESD precautions are essential
• Transconductance (gm) plays the FET's amplification role, similar to how β does for a BJT

Related Topics

Prerequisites: Introduction to Semiconductor Devices, Bipolar Junction Transistors, PN Junction Diodes

Related Topics: Power Semiconductors, Advanced Semiconductor Devices, CMOS digital logic

Next Topics: Power Semiconductors, Semiconductor Manufacturing, Advanced Semiconductor Devices