10. Analog to Digital Conversion
Learning Objectives
- Explain what an ADC does and why analog signals must be digitized for processing
- Define sampling, quantization, and resolution as the three stages of A/D conversion
- Explain how a flash ADC, a successive approximation ADC, and a delta-sigma ADC each work
- Compare the speed, accuracy, and cost trade-offs among the three ADC types
- Explain quantization error and why it is an unavoidable part of digitizing a signal
- Apply ADC concepts to a real sensor-reading scenario
Quick Answer
An analog-to-digital converter (ADC) takes a continuous analog signal — like a voltage from a microphone, sensor, or thermistor — and converts it into a discrete digital value a computer can store and process. It matters because virtually all real-world quantities (sound, temperature, light, pressure) are analog, while all digital computation requires binary numbers, so an ADC is the essential bridge that lets digital systems "see" the analog world. The process always involves two unavoidable steps: sampling (measuring the analog signal at specific moments in time) and quantization (rounding each sample to the nearest representable digital value).
How Analog-to-Digital Conversion Works
Sampling and Quantization
Sampling captures the value of a continuous analog signal at regular time intervals — the sampling rate determines how often measurements are taken (e.g., 44,100 samples per second for CD audio). The Nyquist theorem states that to faithfully capture a signal, you must sample at more than twice its highest frequency component; sampling too slowly causes aliasing, where the digitized signal misrepresents the original frequency.
Quantization rounds each sampled analog value to the nearest of a fixed number of discrete digital levels, determined by the ADC's resolution (2ⁿ levels for n bits). Because the analog value almost never lands exactly on a representable level, quantization always introduces a small unavoidable rounding error, called quantization error, whose maximum size shrinks as resolution (bit count) increases.
Flash ADC
A flash ADC compares the input voltage simultaneously against 2ⁿ − 1 reference voltage levels using that many parallel comparators, then a priority encoder converts the comparator outputs into a binary code — all in essentially a single step.
Advantages: extremely fast, since conversion happens in one parallel step rather than several sequential ones — ideal for very high-speed applications like digital oscilloscopes. Disadvantages: the number of comparators needed doubles with each added bit of resolution (2ⁿ − 1 comparators for n bits), making flash ADCs expensive and power-hungry at high resolutions, so they are typically limited to lower bit counts (commonly 6-8 bits).
Successive Approximation ADC (SAR)
A SAR ADC uses a binary search strategy: it starts by testing whether the input is above or below the midpoint of its range, sets the most significant bit accordingly, then repeats the test on progressively narrower ranges for each remaining bit, from MSB to LSB.
How it works, step by step:
- Start with all bits at their midpoint guess (MSB = 1, rest = 0)
- Compare the resulting DAC-generated voltage to the input
- If the input is higher, keep that bit as 1; if lower, reset it to 0
- Move to the next bit and repeat, narrowing the range each time
- After n comparisons (for n bits), the digital code is complete
Advantages: needs only one comparator regardless of resolution, and offers a good balance of moderate speed, good accuracy, and reasonable cost — this is why SAR ADCs are the most common general-purpose ADC type, found in most microcontrollers. Disadvantages: slower than flash ADCs, since it needs n sequential comparison steps rather than one parallel step.
Delta-Sigma ADC
A delta-sigma ADC oversamples the input at a very high rate using a simple 1-bit comparator, then applies noise-shaping and digital filtering to extract a high-resolution digital value from that oversampled bitstream.
Advantages: achieves very high resolution (16-24 bits) and excellent noise rejection, at low power. Disadvantages: trades away speed — conversion takes many oversampling cycles, making delta-sigma ADCs unsuitable for very high-speed signals, but ideal for precision, lower-bandwidth measurements like audio or weighing scales.
Real-World Example
A digital thermometer uses a thermistor (a temperature-sensitive resistor) to produce an analog voltage proportional to temperature. A SAR ADC samples that voltage, say, 10 times per second, and converts each sample into a 10-bit digital value (0-1023). Firmware then maps that digital code to a temperature reading, which is displayed on the screen — the same three-stage process (sample, quantize, interpret) used by nearly every sensor-reading digital device.
Common Misunderstanding
Students often think an ADC can capture an analog signal with perfect accuracy given enough time. In reality, quantization error is fundamentally unavoidable at any finite resolution — even an ideal ADC with zero noise still rounds every sample to the nearest of a limited number of digital levels, so some information about the exact analog value is always lost. Higher resolution shrinks this error but never eliminates it entirely.
Key Terms
| Term | Definition | Related Concept |
|---|---|---|
| ADC | Analog-to-Digital Converter — converts a continuous signal into a digital value | Signal conversion |
| Sampling | Measuring an analog signal's value at regular time intervals | Sampling rate, Nyquist theorem |
| Quantization | Rounding a sampled value to the nearest representable digital level | Quantization error |
| Resolution | The number of distinct digital levels an ADC can represent, equal to 2ⁿ for n bits | Precision |
| Flash ADC | An ADC using 2ⁿ−1 parallel comparators for single-step conversion | High speed, low resolution |
| Successive approximation (SAR) ADC | An ADC using a binary-search comparison strategy, one bit at a time | General-purpose, moderate speed |
| Delta-sigma ADC | An ADC using oversampling and noise shaping for very high resolution | High precision, low speed |
| Aliasing | Distortion caused by sampling a signal below twice its highest frequency | Nyquist theorem violation |
Common Mistakes
Misconception: An ADC can convert an analog signal without any loss of information if it samples fast enough. Why it's wrong: Sampling rate only addresses time-domain accuracy (avoiding aliasing); quantization error, caused by rounding each sample to a finite number of digital levels, exists independently of sampling rate and cannot be eliminated at any finite resolution. Correct understanding: Both sampling rate (governed by the Nyquist theorem) and resolution (bit count) must be adequate — increasing one does not compensate for a deficiency in the other.
Misconception: Flash ADCs are always the best choice because they are the fastest type. Why it's wrong: Flash ADCs need 2ⁿ−1 comparators, so their cost, size, and power consumption grow exponentially with resolution, making high-resolution flash ADCs impractical. Correct understanding: Choose the ADC architecture based on the application's actual needs — flash for very high speed at low resolution, SAR for balanced general-purpose use, delta-sigma for high resolution at lower speed.
Misconception: A successive approximation ADC checks every possible digital code one at a time, like counting up from zero. Why it's wrong: That describes a much slower "counting" ADC design. A SAR ADC uses a binary search, testing the midpoint of the remaining range at each step, which requires only n comparisons for n bits rather than up to 2ⁿ comparisons. Correct understanding: SAR conversion determines one bit per comparison, from the MSB down to the LSB, narrowing the search range by half at each step — dramatically faster than sequential counting.
Comparison and Connections
| ADC Type | Speed | Resolution | Comparators Needed | Best For |
|---|---|---|---|---|
| Flash | Very fast | Low (6-8 bit typical) | 2ⁿ − 1 | High-speed applications (oscilloscopes, video) |
| Successive Approximation (SAR) | Moderate | Moderate to high | 1 | General-purpose (microcontrollers, sensors) |
| Delta-Sigma | Slow | Very high (16-24 bit) | 1 (oversampled) | Precision, low-bandwidth (audio, weighing) |
Practice Questions
Recall
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What are the two fundamental steps every ADC performs on an analog signal? Sampling (measuring at regular time intervals) and quantization (rounding to the nearest digital level).
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How many comparators does a flash ADC need for 4-bit resolution? 2⁴ − 1 = 15 comparators.
Understanding
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Explain why quantization error can never be completely eliminated, no matter how the ADC is designed. Because any ADC with finite resolution can only represent a limited number of discrete digital levels, and an analog input can take on infinitely many possible values — some rounding to the nearest available level is unavoidable, though increasing resolution shrinks the size of the error.
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Why is a SAR ADC much faster than a hypothetical ADC that tests every possible code sequentially from zero? Because SAR performs a binary search, eliminating half of the remaining possible codes with each comparison, so it needs only n comparisons for n bits, whereas testing sequentially from zero could require up to 2ⁿ comparisons in the worst case.
Application
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A design needs to digitize a video signal at extremely high speed but can tolerate relatively low bit-depth. Which ADC architecture is most appropriate? A flash ADC, because its single-step parallel comparison gives the highest conversion speed, and video applications often don't require extremely high resolution per sample.
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A precision weighing scale needs very high resolution (20+ bits) to detect tiny weight changes, but does not need fast updates. Which ADC type fits best? A delta-sigma ADC, since it can achieve very high resolution through oversampling and noise shaping, and the scale's slow update requirement matches delta-sigma's inherently slower conversion process.
Analysis
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A student claims that doubling an ADC's sampling rate will halve its quantization error. Evaluate this claim. This claim is incorrect — sampling rate and quantization error are governed by different parameters. Quantization error depends on the ADC's resolution (number of bits), not how frequently it samples; doubling the sampling rate only affects how well the ADC tracks changes in the signal over time (relevant to aliasing), not how precisely each individual sample is rounded.
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Compare a SAR ADC and a delta-sigma ADC for a general-purpose microcontroller application needing moderate speed and moderate-to-good accuracy at low cost. Which is the more common choice and why? The SAR ADC is the more common choice, because it offers a good balance of speed, accuracy, and low circuit complexity (needing only one comparator) suited to general sensor-reading tasks, whereas a delta-sigma ADC's higher resolution comes at the cost of conversion speed that is often unnecessary for typical microcontroller applications.
FAQ
Why do we need to sample an analog signal instead of converting it continuously? Digital systems fundamentally work with discrete numbers processed at discrete moments in time, so an ADC must "freeze" the analog signal's value at specific instants (sampling) before it can be converted into a digital number — continuous, instantaneous digital representation of a continuously changing signal isn't physically meaningful.
What happens if the sampling rate is too low? The digitized signal can suffer from aliasing, where high-frequency components in the original analog signal are misrepresented as false lower-frequency components in the digital output, corrupting the signal in a way that cannot be corrected after the fact.
Why is resolution described in bits rather than a percentage or decimal number? Because ADC output is inherently binary — an n-bit ADC has exactly 2ⁿ possible output codes — so expressing resolution in bits directly reflects the digital representation's granularity and makes it easy to compare across different ADC designs.
Can an ADC and a DAC be used together to "clean up" a noisy analog signal? Not directly for noise removal — an ADC captures a signal (including noise) as digital samples, and a DAC would reconstruct it (noise included) back into analog form. Actual noise reduction requires additional digital signal processing (like filtering) applied to the digitized samples before conversion back to analog.
Why do audio systems commonly use delta-sigma ADCs instead of SAR or flash? Because audio quality benefits enormously from high resolution and low noise, and delta-sigma's oversampling and noise-shaping techniques achieve both while operating at speeds more than sufficient for audio bandwidths (which are much lower than, say, video signal bandwidths).
Quick Revision
- An ADC converts a continuous analog signal into a discrete digital value
- Sampling captures the signal at regular time intervals; quantization rounds each sample to the nearest digital level
- The Nyquist theorem requires sampling above twice the signal's highest frequency to avoid aliasing
- Quantization error is unavoidable at any finite resolution, but shrinks as bit count increases
- Flash ADC: single-step, very fast, needs 2ⁿ−1 comparators, limited to low resolution
- SAR ADC: binary-search, one comparator, moderate speed, most common general-purpose type
- Delta-sigma ADC: oversampling plus filtering, very high resolution, slower, ideal for audio/precision measurement
- Resolution = 2ⁿ digital levels for n bits, same underlying idea as DAC resolution
Related Topics
Prerequisites: Digital-to-analog conversion, binary number system, basic comparator circuits
Related Topics: Sampling theory (Nyquist theorem), signal processing, sensor interfacing
Next Topics: Applying ADC/DAC concepts in embedded systems and digital signal processing