2. Logic Gates
Learning Objectives
- Define a logic gate and explain how it maps binary inputs to a binary output
- Write the truth table for AND, OR, NOT, NAND, NOR, XOR, and XNOR gates
- Relate each gate's behavior to its Boolean algebra operator and standard symbol
- Explain why NAND and NOR are called "universal gates"
- Predict the output of a multi-gate circuit given a set of input signals
- Identify real-world applications where each gate type is used
Quick Answer
A logic gate is an electronic circuit that takes one or more binary inputs (0 or 1) and produces a single binary output based on a fixed logical rule. Gates are the physical implementation of Boolean algebra: AND, OR, and NOT are the basic operations, while NAND, NOR, XOR, and XNOR are derived gates built by combining or modifying them. Every digital system — from a calculator to a CPU — is ultimately just millions of these gates wired together. Understanding gates matters because it is the bridge between abstract Boolean logic and real hardware made of transistors.
What a Logic Gate Actually Does
Inside a gate, the "1" and "0" are not abstract symbols — they are voltage levels. A high voltage (typically close to the supply voltage) represents 1, and a low voltage (close to 0V) represents 0. A gate is built from transistors arranged so that combinations of high/low inputs force the output transistor network into a high or low state. The truth table is simply a complete record of that behavior for every possible input combination.
The Basic Gates
NOT Gate (Inverter) — one input, output is the opposite of the input.
| Input | Output |
|---|---|
| 0 | 1 |
| 1 | 0 |
Boolean expression: Y = A' (also written as Ā)
AND Gate — output is 1 only when every input is 1.
| A | B | Y = A·B |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
OR Gate — output is 1 when at least one input is 1.
| A | B | Y = A+B |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
The Derived (Universal) Gates
NAND Gate — AND followed by NOT. Output is 0 only when all inputs are 1.
| A | B | Y = (A·B)' |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
NOR Gate — OR followed by NOT. Output is 1 only when all inputs are 0.
| A | B | Y = (A+B)' |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 0 |
XOR Gate (Exclusive OR) — output is 1 when the inputs differ.
| A | B | Y = A⊕B |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
XNOR Gate (Exclusive NOR) — output is 1 when the inputs are the same.
| A | B | Y = (A⊕B)' |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
Why NAND and NOR Are "Universal"
Any Boolean function — no matter how complex — can be built using only NAND gates, or only NOR gates. This is why chip manufacturers often build entire circuits from a single gate type: it simplifies fabrication. For example, a NOT gate can be made from a single NAND gate by tying both its inputs together (A NAND A = A'). An AND gate is a NAND followed by another NAND acting as an inverter. This universality is a major reason NAND is the default building block in most CMOS logic families.
Real-World Example
Inside a car's central locking system, an OR gate combines signals from the driver's door switch and the key fob receiver — either one unlocking the car is enough. A NOT gate might invert a "door open" sensor so the alarm circuit sees "door closed = 1." These are the same gates from the truth tables above, just wired into a specific job.
Key Terms
| Term | Definition | Related Concept |
|---|---|---|
| Logic gate | A circuit producing one binary output from one or more binary inputs | Boolean algebra |
| Truth table | A table listing every input combination and the corresponding output | Gate verification |
| Universal gate | A gate (NAND or NOR) that can implement any Boolean function alone | Circuit minimization |
| Boolean algebra | The mathematical system of AND, OR, NOT operations on binary variables | Logic gates |
| Fan-in | The number of inputs a gate can accept | Gate design |
| Fan-out | The number of gate inputs a single gate output can drive | Circuit loading |
| Propagation delay | The time between an input change and the resulting output change | Gate speed |
| XOR | Exclusive OR — true only when inputs differ | Parity, adders |
Common Mistakes
Misconception: NAND is just "NOT AND" and behaves like OR. Why it's wrong: Students confuse De Morgan's equivalent forms with the gates themselves. NAND's truth table matches OR only if you also invert both inputs — a plain NAND and a plain OR have different truth tables (compare row A=0, B=1: NAND gives 1, OR also gives 1, but at A=1,B=1: NAND gives 0, OR gives 1). Correct understanding: NAND = AND then invert. Its output is 0 in exactly one case (all inputs 1) — memorize it as "1 unless everything is 1."
Misconception: XOR is the same as OR, just with a different name. Why it's wrong: OR outputs 1 when both inputs are 1, but XOR outputs 0 in that case. They only agree when at most one input is 1. Correct understanding: XOR means "one or the other, but not both" — it detects a difference between inputs, which is why it's central to binary addition (sum bit) and parity checking.
Misconception: A gate with more inputs (say, a 3-input AND) just repeats the 2-input truth table. Why it's wrong: An n-input AND gate has 2ⁿ rows in its truth table, and outputs 1 only in the single row where all n inputs are 1 — the table grows exponentially, not linearly. Correct understanding: For any number of inputs, AND is "all must be 1" and OR is "at least one must be 1" — the rule stays the same, but the truth table size doubles with each added input.
Comparison and Connections
| Gate | Output is 1 when... | Universal? | Boolean symbol |
|---|---|---|---|
| AND | All inputs are 1 | No | A·B |
| OR | Any input is 1 | No | A+B |
| NOT | Input is 0 | No | A' |
| NAND | Not all inputs are 1 | Yes | (A·B)' |
| NOR | No inputs are 1 | Yes | (A+B)' |
| XOR | Inputs differ | No | A⊕B |
| XNOR | Inputs match | No | (A⊕B)' |
Practice Questions
Recall
-
What output does a 2-input AND gate produce when both inputs are 0? 0 — AND requires every input to be 1 to output 1.
-
Write the Boolean expression for a NOR gate with inputs A and B. Y = (A + B)'
Understanding
-
Explain why NAND is called a universal gate. Because any Boolean function, including AND, OR, and NOT, can be constructed using only NAND gates in combination — no other gate type is required.
-
Why does XOR output 0 when both inputs are 1, unlike OR? XOR specifically detects a difference between its inputs. When both inputs are the same (both 1 or both 0), there is no difference, so XOR outputs 0. OR only checks whether at least one input is 1, regardless of whether they match.
Application
-
A security system should trigger an alarm (output 1) only if a door sensor (D) AND a motion sensor (M) are both active. Which gate should be used, and what is the truth table? An AND gate. Output is 1 only when D=1 and M=1; otherwise 0.
-
You want a light to switch on if either of two independent switches is flipped, but never if both fail (an OR-like fault path). Which gate models "at least one input active"? The OR gate — output is 1 if either or both switches are on.
Analysis
-
Two NAND gates are connected so that gate 1's output feeds both inputs of gate 2. If both inputs to gate 1 are 1, trace the final output. Gate 1: 1 NAND 1 = 0. Gate 2 receives 0 and 0 as both inputs: 0 NAND 0 = 1. Final output is 1. This configuration turns two NANDs into an AND gate.
-
Compare NAND and NOR in terms of which gives 1 more often across all input combinations for 2 inputs. Which is "easier" to satisfy? NAND outputs 1 in 3 of 4 rows (all except 1,1). NOR outputs 1 in only 1 of 4 rows (only 0,0). NAND is easier to satisfy — it defaults to 1 unless everything is high, while NOR defaults to 0 unless everything is low.
FAQ
Why do we need both NAND and NOR if either one alone is universal? Either gate alone is theoretically sufficient, but in practice, circuit designers pick whichever gate is more efficient to fabricate for a given technology or gives fewer total gates for a specific function. Having both available lets designers choose the more economical implementation.
Can a logic gate have more than two inputs? Yes. AND, OR, NAND, and NOR gates are commonly available with 3, 4, or 8 inputs. The rule stays the same — AND still requires all inputs to be 1, OR still requires at least one — but the truth table has more rows.
How is a gate physically built? Modern gates are built from CMOS transistors — pairs of complementary MOSFETs arranged so that only one path (pull-up or pull-down) conducts for any given input combination, producing a clean high or low output with very little power draw when idle.
What is propagation delay and why does it matter? Propagation delay is the tiny time lag between an input changing and the output responding, caused by the physical switching time of transistors. In high-speed circuits like CPUs, stacking many gates in series adds up these delays and limits how fast the whole system can run.
Why does XOR matter so much in computer arithmetic? XOR produces the sum bit in binary addition (1+0=1, 1+1=0 with a carry) and is used to detect differences between bit patterns, which is exactly what parity checking and error detection need.
Quick Revision
- A logic gate maps binary inputs to one binary output using a fixed rule
- AND = 1 only if all inputs are 1; OR = 1 if any input is 1; NOT = inverts
- NAND = inverted AND (0 only when all inputs are 1); NOR = inverted OR (1 only when all inputs are 0)
- XOR = 1 when inputs differ; XNOR = 1 when inputs match
- NAND and NOR are universal gates — either can build any Boolean circuit alone
- Truth tables grow as 2ⁿ rows for n inputs
- Boolean symbols: AND = ·, OR = +, NOT = ', XOR = ⊕
- Gates are physically built from CMOS transistor pairs
- Propagation delay is the switching lag through a gate, critical for circuit speed
Related Topics
Prerequisites: Binary number system, basic Boolean algebra concepts, voltage levels in digital circuits
Related Topics: Boolean algebra simplification, De Morgan's theorems, combinational circuits
Next Topics: Combinational circuits (adders, multiplexers), sequential circuits and flip-flops